diff --git a/src/scene/mod.rs b/src/scene/mod.rs index e3022dcab..8f62dd70d 100644 --- a/src/scene/mod.rs +++ b/src/scene/mod.rs @@ -4032,38 +4032,8 @@ impl Scene { } } - /// Return the handle of the user viewport whose bounding rectangle contains - /// the given paper-space point, or `None` if no viewport matches. When - /// viewports overlap (e.g. a large viewport that runs off-screen spanning - /// smaller ones), pick the SMALLEST-area match — the topmost one the user - /// actually sees and means to click, not the first in document order. - pub fn viewport_at_paper_point(&self, px: f32, py: f32) -> Option { - let layout_block = self.current_layout_block_handle(); - self.document - .entities() - .filter_map(|e| { - let EntityType::Viewport(vp) = e else { - return None; - }; - if !self.is_content_viewport_in_layout(vp, layout_block) || !vp.status.is_on { - return None; - } - let hw = (vp.width / 2.0) as f32; - let hh = (vp.height / 2.0) as f32; - let cx = vp.center.x as f32; - let cy = vp.center.y as f32; - if px >= cx - hw && px <= cx + hw && py >= cy - hh && py <= cy + hh { - Some((vp.common.handle, (vp.width * vp.height).abs())) - } else { - None - } - }) - .min_by(|a, b| a.1.partial_cmp(&b.1).unwrap_or(std::cmp::Ordering::Equal)) - .map(|(h, _)| h) - } - - /// Like [`viewport_at_paper_point`] but tested against each viewport's - /// *visible* on-screen rectangle (clamped to the canvas), in screen pixels. + /// Return the handle of the user viewport whose *visible* on-screen + /// rectangle (clamped to the canvas) contains the given screen-pixel point. /// Viewport activation goes through this so a click only enters a viewport /// when it lands on the part the user can actually see — clicking the empty /// area beside a viewport that runs off-screen no longer matches its full diff --git a/src/scene/pipeline/wire_gpu.rs b/src/scene/pipeline/wire_gpu.rs index 5c7079ad2..f47498709 100644 --- a/src/scene/pipeline/wire_gpu.rs +++ b/src/scene/pipeline/wire_gpu.rs @@ -27,8 +27,6 @@ use crate::scene::model::wire_model::WireModel; use iced::wgpu; -#[cfg(not(target_arch = "wasm32"))] -use crate::par::prelude::*; /// Allocate a VERTEX buffer with `mapped_at_creation` and write `data` directly /// into the mapped slice. Skips the intermediate staging copy that