feat: GPU scissor rect for paper-space viewport wires

Viewport-projected wires now clip at pixel level to their viewport boundary.

- WireModel.vp_scissor: Option<[f32; 4]> — paper-space bbox set on projection
- WireGpu.vp_scissor carries it through to the draw loop
- Pipeline.compute_wire_scissors() converts paper→NDC→pixel each frame
- render() calls set_scissor_rect() per wire, reset after viewport group
- INTEGRATION_GAPS.md: Viewport ⚠️ → ✅, all 51 gaps resolved

Co-Authored-By: Claude Sonnet 4.6 <[email protected]>

src/modules/annotate/aligned_dim.rs

@@ -103,6 +103,7 @@ impl CadCommand for AlignedDimensionCommand {
             key_vertices: vec![],
             aabb: WireModel::UNBOUNDED_AABB,
             plinegen: true,
+            vp_scissor: None,
         })
     }
 }
@@ -138,5 +139,6 @@ fn preview_aligned(p1: Vec3, p2: Vec3, dim_pt: Vec3) -> WireModel {
             key_vertices: vec![],
             aabb: WireModel::UNBOUNDED_AABB,
             plinegen: true,
+            vp_scissor: None,
     }
 }

src/modules/annotate/angular_dim.rs

@@ -126,6 +126,7 @@ fn preview_wire(points: Vec<Vec3>) -> WireModel {
             key_vertices: vec![],
             aabb: WireModel::UNBOUNDED_AABB,
             plinegen: true,
+            vp_scissor: None,
     }
 }
 

src/modules/annotate/diameter_dim.rs

@@ -102,5 +102,6 @@ fn preview_line(a: Vec3, b: Vec3) -> WireModel {
             key_vertices: vec![],
             aabb: WireModel::UNBOUNDED_AABB,
             plinegen: true,
+            vp_scissor: None,
     }
 }

src/modules/annotate/dim_baseline.rs

@@ -144,6 +144,7 @@ impl CadCommand for DimBaselineCommand {
             key_vertices: vec![],
             aabb: WireModel::UNBOUNDED_AABB,
             plinegen: true,
+            vp_scissor: None,
         })
     }
 }

src/modules/annotate/dim_continue.rs

@@ -141,6 +141,7 @@ impl CadCommand for DimContinueCommand {
             key_vertices: vec![],
             aabb: WireModel::UNBOUNDED_AABB,
             plinegen: true,
+            vp_scissor: None,
         })
     }
 }

src/modules/annotate/dimjogline.rs

@@ -95,6 +95,7 @@ impl CadCommand for DimJogLineCommand {
             key_vertices: vec![],
             aabb: WireModel::UNBOUNDED_AABB,
             plinegen: true,
+            vp_scissor: None,
         })
     }
 }

src/modules/annotate/dimtedit.rs

@@ -103,6 +103,7 @@ impl CadCommand for DimTeditCommand {
             key_vertices: vec![],
             aabb: WireModel::UNBOUNDED_AABB,
             plinegen: true,
+            vp_scissor: None,
         })
     }
 

src/modules/annotate/leader_cmd.rs

@@ -203,6 +203,7 @@ fn preview_wire(pts: &[Vec3]) -> WireModel {
             key_vertices: vec![],
             aabb: WireModel::UNBOUNDED_AABB,
             plinegen: true,
+            vp_scissor: None,
     }
 }
 

src/modules/annotate/linear_dim.rs

@@ -114,6 +114,7 @@ fn preview_wire(points: Vec<Vec3>) -> WireModel {
             key_vertices: vec![],
             aabb: WireModel::UNBOUNDED_AABB,
             plinegen: true,
+            vp_scissor: None,
     }
 }
 

src/modules/annotate/mleader_cmd.rs

@@ -156,6 +156,7 @@ fn preview_wire(pts: &[Vec3]) -> WireModel {
             key_vertices: vec![],
             aabb: WireModel::UNBOUNDED_AABB,
             plinegen: true,
+            vp_scissor: None,
     }
 }
 

src/modules/annotate/mleader_edit.rs

@@ -367,6 +367,7 @@ fn preview_wire(pts: &[Vec3]) -> WireModel {
         key_vertices: vec![],
         aabb: WireModel::UNBOUNDED_AABB,
             plinegen: true,
+            vp_scissor: None,
     }
 }
 

src/modules/annotate/qdim.rs

@@ -100,6 +100,7 @@ impl CadCommand for QdimCommand {
             key_vertices: vec![],
             aabb: WireModel::UNBOUNDED_AABB,
             plinegen: true,
+            vp_scissor: None,
         })
     }
 }

src/modules/annotate/radius_dim.rs

@@ -113,5 +113,6 @@ fn preview_wire(points: Vec<Vec3>) -> WireModel {
             key_vertices: vec![],
             aabb: WireModel::UNBOUNDED_AABB,
             plinegen: true,
+            vp_scissor: None,
     }
 }

src/modules/annotate/table_cmd.rs

@@ -146,6 +146,7 @@ impl CadCommand for TableCommand {
             key_vertices: vec![],
             aabb: WireModel::UNBOUNDED_AABB,
             plinegen: true,
+            vp_scissor: None,
             })
         } else {
             None

src/modules/annotate/tolerance_cmd.rs

@@ -99,6 +99,7 @@ impl CadCommand for ToleranceCommand {
             key_vertices: vec![],
             aabb: WireModel::UNBOUNDED_AABB,
             plinegen: true,
+            vp_scissor: None,
         })
     }
 }